Struct rp2040_pac2::pwm::regs::Ch0Csr

#[repr(transparent)]pub struct Ch0Csr(pub u32);

Control and status register

Implementations

impl Ch0Csr

pub const fn ph_adv(&self) -> bool

Advance the phase of the counter by 1 count, while it is running. Self-clearing. Write a 1, and poll until low. Counter must be running at less than full speed (div_int + div_frac / 16 > 1)

pub fn set_ph_adv(&mut self, val: bool)

Advance the phase of the counter by 1 count, while it is running. Self-clearing. Write a 1, and poll until low. Counter must be running at less than full speed (div_int + div_frac / 16 > 1)

pub const fn ph_ret(&self) -> bool

Retard the phase of the counter by 1 count, while it is running. Self-clearing. Write a 1, and poll until low. Counter must be running.

pub fn set_ph_ret(&mut self, val: bool)

Retard the phase of the counter by 1 count, while it is running. Self-clearing. Write a 1, and poll until low. Counter must be running.

pub const fn divmode(&self) -> Divmode

pub fn set_divmode(&mut self, val: Divmode)

pub const fn b_inv(&self) -> bool

Invert output B

pub fn set_b_inv(&mut self, val: bool)

Invert output B

pub const fn a_inv(&self) -> bool

Invert output A

pub fn set_a_inv(&mut self, val: bool)

Invert output A

pub const fn ph_correct(&self) -> bool

1: Enable phase-correct modulation. 0: Trailing-edge

pub fn set_ph_correct(&mut self, val: bool)

1: Enable phase-correct modulation. 0: Trailing-edge

pub const fn en(&self) -> bool

Enable the PWM channel.

pub fn set_en(&mut self, val: bool)

Enable the PWM channel.

Trait Implementations

impl Clone for Ch0Csr

fn clone(&self) -> Ch0Csr

Returns a copy of the value.

pub fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for Ch0Csr

impl Default for Ch0Csr

fn default() -> Ch0Csr

Returns the “default value” for a type.