Struct rp2040_pac2::pll::Pll [−][src]
Implementations
impl Pll[src]
pub fn cs(self) -> Reg<Cs, RW>[src]
Control and Status GENERAL CONSTRAINTS: Reference clock frequency min=5MHz, max=800MHz Feedback divider min=16, max=320 VCO frequency min=400MHz, max=1600MHz
pub fn pwr(self) -> Reg<Pwr, RW>[src]
Controls the PLL power modes.
pub fn fbdiv_int(self) -> Reg<FbdivInt, RW>[src]
Feedback divisor (note: this PLL does not support fractional division)
pub fn prim(self) -> Reg<Prim, RW>[src]
Controls the PLL post dividers for the primary output (note: this PLL does not have a secondary output) the primary output is driven from VCO divided by postdiv1*postdiv2
Trait Implementations
impl Clone for Pll[src]
fn clone(&self) -> Pll[src]
pub fn clone_from(&mut self, source: &Self)1.0.0[src]
impl Copy for Pll[src]
impl Send for Pll[src]
impl Sync for Pll[src]
Auto Trait Implementations
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized, [src]
T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized, [src]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized, [src]
T: ?Sized,
pub fn borrow_mut(&mut self) -> &mut T[src]
impl<T> From<T> for T[src]
impl<T, U> Into<U> for T where
U: From<T>, [src]
U: From<T>,
impl<T, U> TryFrom<U> for T where
U: Into<T>, [src]
U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>[src]
impl<T, U> TryInto<U> for T where
U: TryFrom<T>, [src]
U: TryFrom<T>,