Struct rp2040_pac2::sio::regs::Interp1Accum1Add[][src]

#[repr(transparent)]pub struct Interp1Accum1Add(pub u32);

Values written here are atomically added to ACCUM1 Reading yields lane 1’s raw shift and mask value (BASE1 not added).

Implementations

impl Interp1Accum1Add[src]

pub const fn interp1_accum1_add(&self) -> u32[src]

pub fn set_interp1_accum1_add(&mut self, val: u32)[src]

Trait Implementations

impl Clone for Interp1Accum1Add[src]

impl Copy for Interp1Accum1Add[src]

impl Default for Interp1Accum1Add[src]

Auto Trait Implementations

impl Send for Interp1Accum1Add

impl Sync for Interp1Accum1Add

impl Unpin for Interp1Accum1Add

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.