Struct rp2040_pac2::sio::regs::Interp1Accum1Add [−][src]
Values written here are atomically added to ACCUM1 Reading yields lane 1’s raw shift and mask value (BASE1 not added).
Implementations
impl Interp1Accum1Add
[src][−]
pub const fn interp1_accum1_add(&self) -> u32
[src]
pub fn set_interp1_accum1_add(&mut self, val: u32)
[src]
Trait Implementations
impl Clone for Interp1Accum1Add
[src][+]
impl Copy for Interp1Accum1Add
[src]
impl Default for Interp1Accum1Add
[src][+]
Auto Trait Implementations
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
[src][+]
T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
[src][+]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
[src][+]
T: ?Sized,
impl<T> From<T> for T
[src][+]
impl<T, U> Into<U> for T where
U: From<T>,
[src][+]
U: From<T>,
impl<T, U> TryFrom<U> for T where
U: Into<T>,
[src][+]
U: Into<T>,
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
[src][+]
U: TryFrom<T>,