Struct rp2040_pac2::pio::Pio

pub struct Pio(pub *mut u8);

Programmable IO block

Implementations

impl Pio

pub fn ctrl(self) -> Reg<Ctrl, RW>

PIO control register

pub fn fstat(self) -> Reg<Fstat, RW>

FIFO status register

pub fn fdebug(self) -> Reg<Fdebug, RW>

FIFO debug register

pub fn flevel(self) -> Reg<Flevel, RW>

FIFO levels

pub fn irq(self) -> Reg<Irq, RW>

Interrupt request register. Write 1 to clear

pub fn irq_force(self) -> Reg<IrqForce, RW>

Writing a 1 to each of these bits will forcibly assert the corresponding IRQ. Note this is different to the INTF register: writing here affects PIO internal state. INTF just asserts the processor-facing IRQ signal for testing ISRs, and is not visible to the state machines.

pub fn input_sync_bypass(self) -> Reg<u32, RW>

There is a 2-flipflop synchronizer on each GPIO input, which protects PIO logic from metastabilities. This increases input delay, and for fast synchronous IO (e.g. SPI) these synchronizers may need to be bypassed. Each bit in this register corresponds to one GPIO. 0 -> input is synchronized (default) 1 -> synchronizer is bypassed If in doubt, leave this register as all zeroes.

pub fn dbg_padout(self) -> Reg<u32, R>

Read to sample the pad output values PIO is currently driving to the GPIOs.

pub fn dbg_padoe(self) -> Reg<u32, R>

Read to sample the pad output enables (direction) PIO is currently driving to the GPIOs.

pub fn dbg_cfginfo(self) -> Reg<DbgCfginfo, RW>

The PIO hardware has some free parameters that may vary between chip products. These should be provided in the chip datasheet, but are also exposed here.

pub fn intr(self) -> Reg<Intr, RW>

Raw Interrupts

pub fn txf(self, n: usize) -> Reg<u32, W>

Direct write access to the TX FIFO for this state machine. Each write pushes one word to the FIFO.

pub fn instr_mem(self, n: usize) -> Reg<InstrMem, RW>

Write-only access to instruction memory location 0

pub fn rxf(self, n: usize) -> Reg<u32, R>

Direct read access to the RX FIFO for this state machine. Each read pops one word from the FIFO.

pub fn sm(self, n: usize) -> StateMachine

pub fn irqs(self, n: usize) -> Irq

Trait Implementations

impl Clone for Pio

fn clone(&self) -> Pio

Returns a copy of the value.

pub fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for Pio

impl Send for Pio

impl Sync for Pio