Struct rp2040_pac2::pio::regs::SmClkdiv[][src]

#[repr(transparent)]pub struct SmClkdiv(pub u32);

Clock divider register for state machine 0 Frequency = clock freq / (CLKDIV_INT + CLKDIV_FRAC / 256)

Implementations

impl SmClkdiv[src]

pub const fn int(&self) -> u16[src]

Effective frequency is sysclk/int. Value of 0 is interpreted as max possible value

pub fn set_int(&mut self, val: u16)[src]

Effective frequency is sysclk/int. Value of 0 is interpreted as max possible value

pub const fn frac(&self) -> u8[src]

Fractional part of clock divider

pub fn set_frac(&mut self, val: u8)[src]

Fractional part of clock divider

Trait Implementations

impl Clone for SmClkdiv[src]

impl Copy for SmClkdiv[src]

impl Default for SmClkdiv[src]

Auto Trait Implementations

impl Send for SmClkdiv

impl Sync for SmClkdiv

impl Unpin for SmClkdiv

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.