Struct rp2040_pac2::clocks::regs::ClkGpout0Ctrl

#[repr(transparent)]pub struct ClkGpout0Ctrl(pub u32);

Clock control, can be changed on-the-fly (except for auxsrc)

Implementations

impl ClkGpout0Ctrl

pub const fn nudge(&self) -> bool

An edge on this signal shifts the phase of the output by 1 cycle of the input clock This can be done at any time

pub fn set_nudge(&mut self, val: bool)

An edge on this signal shifts the phase of the output by 1 cycle of the input clock This can be done at any time

pub const fn phase(&self) -> u8

This delays the enable signal by up to 3 cycles of the input clock This must be set before the clock is enabled to have any effect

pub fn set_phase(&mut self, val: u8)

This delays the enable signal by up to 3 cycles of the input clock This must be set before the clock is enabled to have any effect

pub const fn dc50(&self) -> bool

Enables duty cycle correction for odd divisors

pub fn set_dc50(&mut self, val: bool)

Enables duty cycle correction for odd divisors

pub const fn enable(&self) -> bool

Starts and stops the clock generator cleanly

pub fn set_enable(&mut self, val: bool)

Starts and stops the clock generator cleanly

pub const fn kill(&self) -> bool

Asynchronously kills the clock generator

pub fn set_kill(&mut self, val: bool)

Asynchronously kills the clock generator

pub const fn auxsrc(&self) -> ClkGpout0CtrlAuxsrc

Selects the auxiliary clock source, will glitch when switching

pub fn set_auxsrc(&mut self, val: ClkGpout0CtrlAuxsrc)

Selects the auxiliary clock source, will glitch when switching

Trait Implementations

impl Clone for ClkGpout0Ctrl

fn clone(&self) -> ClkGpout0Ctrl

Returns a copy of the value.

pub fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for ClkGpout0Ctrl

impl Default for ClkGpout0Ctrl

fn default() -> ClkGpout0Ctrl

Returns the “default value” for a type.