Struct rp2040_pac2::adc::regs::Div[][src]

#[repr(transparent)]pub struct Div(pub u32);

Clock divider. If non-zero, CS_START_MANY will start conversions at regular intervals rather than back-to-back. The divider is reset when either of these fields are written. Total period is 1 + INT + FRAC / 256

Implementations

impl Div[src]

pub const fn int(&self) -> u16[src]

Integer part of clock divisor.

pub fn set_int(&mut self, val: u16)[src]

Integer part of clock divisor.

pub const fn frac(&self) -> u8[src]

Fractional part of clock divisor. First-order delta-sigma.

pub fn set_frac(&mut self, val: u8)[src]

Fractional part of clock divisor. First-order delta-sigma.

Trait Implementations

impl Clone for Div[src]

impl Copy for Div[src]

impl Default for Div[src]

Auto Trait Implementations

impl Send for Div

impl Sync for Div

impl Unpin for Div

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.