Module rp2040_pac2::xip_ssi::regs

Structs

Baudr	Baud rate
Ctrlr0	Control register 0
Ctrlr1	Master Control register 1
Dmacr	DMA control
Dmardlr	DMA RX data level
Dmatdlr	DMA TX data level
Icr	Interrupt clear
Imr	Interrupt mask
Isr	Interrupt status
Msticr	Multi-master interrupt clear
Mwcr	Microwire Control
Risr	Raw interrupt status
RxSampleDly	RX sample delay
Rxflr	RX FIFO level
Rxftlr	RX FIFO threshold level
Rxoicr	RX FIFO overflow interrupt clear
Rxuicr	RX FIFO underflow interrupt clear
Ser	Slave enable
SpiCtrlr0	SPI control
Sr	Status register
Ssienr	SSI Enable
TxdDriveEdge	TX drive edge
Txflr	TX FIFO level
Txftlr	TX FIFO threshold level
Txoicr	TX FIFO overflow interrupt clear