Struct cortex_m::peripheral::DCB [−][src]
Debug Control Block
Implementations
impl DCB[src]
pub fn enable_trace(&mut self)[src]
Enables TRACE. This is for example required by the
peripheral::DWT cycle counter to work properly.
As by STM documentation, this flag is not reset on
soft-reset, only on power reset.
pub fn disable_trace(&mut self)[src]
Disables TRACE. See DCB::enable_trace() for more details
pub fn is_debugger_attached() -> bool[src]
Is there a debugger attached? (see note)
Note: This function is reported not to work on Cortex-M0 devices. Per the ARM v6-M Architecture Reference Manual, “Access to the DHCSR from software running on the processor is IMPLEMENTATION DEFINED”. Indeed, from the Cortex-M0+ r0p1 Technical Reference Manual, “Note Software cannot access the debug registers.”
impl DCB[src]
pub const PTR: *const RegisterBlock[src]
Pointer to the register block
pub const fn ptr() -> *const RegisterBlock[src]
Returns a pointer to the register block (to be deprecated in 0.7)
Trait Implementations
impl Deref for DCB[src]
type Target = RegisterBlock
The resulting type after dereferencing.
fn deref(&self) -> &Self::Target[src]
impl Send for DCB[src]
Auto Trait Implementations
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized, [src]
T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized, [src]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized, [src]
T: ?Sized,
pub fn borrow_mut(&mut self) -> &mut T[src]
impl<T> From<T> for T[src]
impl<T, U> Into<U> for T where
U: From<T>, [src]
U: From<T>,
impl<T, U> TryFrom<U> for T where
U: Into<T>, [src]
U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>[src]
impl<T, U> TryInto<U> for T where
U: TryFrom<T>, [src]
U: TryFrom<T>,